Melon S3 FPGA (WiFi) Development Board
MELON S3 FPGA Getting Start.pdf
http://ftp.qwavesys.com/MelonS3/MELON S3 FPGA Getting Start.pdf
MELON S3 FPGA Product Datasheet.pdf
http://ftp.qwavesys.com/MelonS3/MELON S3 FPGA Product Datasheet.pdf
The Melon S3 FPGA is open-source, expandable development board perfect for the learning digital circuit design and prototyping of your unique ideas. You can customize the capabilities of the FPGA with snap-on 40-pin "Raspberry Pi HAT". There are serveral shilds in the market offers a low cost module that can be purchased off the shelf. These shiled modules can be plugged directly to the Melon S3 FPGA board for the creation of powerful embedded and digital system applications.
At its heart, the Melon S3 has a Xilinx Spartan 3E 500K FPGA chip from Xilinx®. providing a plentiful amount of digital logic to quickly get your prototyping off the ground and WiFi SoC: WROOM-02 certified module (FCC, CE, TELEC, Wi-Fi Alliance, and SRRC) with an onboard antenna. The WROOM-02 comes with a firmware which will allow you to download a (.bit) file over WiFi to the FPGA without having to buy a JTAG programmer.
Espressif System's WROOM-02 (ESP8266) is a low cost SoC: WiFi+Microcontroller, A 32-bit low power micro-controller with CPU clock of 80MHz, 50KB of user available RAM and an external 4MB of Flash memory with a full WiFi front-end (both as client and access point). Once the board is powered on, the WROOM-02 will configures the FPGA from the internal 4MB flash memory. After the FPGA is successfully configured the WROOM-02 enters slave mode. This allows your FPGA designs to talk to the microcontroller, giving you develop the MCU + FPGA for co-processing application.
Pinout compatible with 40 pin Raspberry Pi standard
- Xilinx Spartan 3E FPGA (PQG208) - 500K gates,
- (73Kb Distributed RAM, 4 Digital Clock Manager (DCM), 20 Multipliers (18x18), 360 Kb Block RAM)
- Onboard USB-UART (Silicon Labs) CP2104 for Configuration, Debugging and Power.
- WiFi 2.4GHz SoC-WROOM-02, 32-bit MCU (Arduino Compatible) Clock 80MHz, 50KB RAM, Integrated TCP/IP protocol stack.
- Flash 4MB SPI Flash which is 1MB for MCU Firmware and 3MB for FPGA Bit space.
- 8 Users LEDs
- 4 DIP Switch user button
- 1 Reset button
- Onboard FPGA cloxk 50MHz
- GPIOs 56 PINs 3.3V Tolerant - 40 PINs x2 (Raspberry Pi 40 PINs Compatible)
- JTAG Port (Optional for Program/Debugging)
OTA (Over-The-Air) Download *.bit file to FPGA over the WiFi.
Arduino compatible source code for FPGA download functionality and Arduino IDE board package also provided to allowing you to easily modify to program the WROOM-02 using Arduino IDE.
In addition, The Melon S3 FPGA can be programmed using established development tools, such as Xilinx ISE (Free: Webpack), MATLAB HDL Coder/HDL Verifier and National Instruments LabVIEW FPGA Toolkit. Lastly, MCU ESP8266 (WROOM-02) can be programmed using Arduino IDE.
1.ISE® WebPACK™ design software is the industry´s only FREE, fully featured front-to-back FPGA design solution. ISE WebPACK is the ideal downloadable solution for FPGA and offering HDL synthesis and simulation, implementation, device fitting, and JTAG programming. ISE WebPACK delivers a complete, front-to-back design flow providing instant access to the ISE features and functionality at no cost. Xilinx has created a solution that allows convenient productivity by providing a design solution that is always up to date with error-free downloading and single file installation. After generated *.bit file you can then upload it to the Melon S3 FPGA via WiFi.
2.With HDL Coder™ and HDL Verifier™, you can automate much of the time-consuming and error-prone work of implementing algorithms on FPGAs. You can quickly evaluate alternative architectures, optimize fixed-point settings, generate HDL code, perform IP core generation and prototype on an FPGA. Additionally, you can use generated HDL code for your ASIC implementation. Using HDL Coder and HDL Verifier, you can:
- Perform HDL design iterations in minutes rather than weeks
- Automatically generate HDL code for FPGA programming or ASIC prototyping and design
- Verify that your HDL design implementation matches the system design specification
- Program Xilinx® and Intel® FPGAs from MATLAB and Simulink
*More infomation please visit https://www.mathworks.com/solutions/hdl-code-generation-verification.html
3.The NI LabVIEW FPGA Module extends the LabVIEW graphical development platform to target FPGAs. LabVIEW FPGA gives developers the ability to more efficiently and effectively design complex systems by providing a highly integrated development environment, a large ecosystem of IP libraries, a high-fidelity simulator, and debugging features.
*More information please visit http://www.ni.com/labview/fpga/
4.with Arduino IDE you can write your own firmware running in MCU (WROOM-02), This allows your FPGA designs to talk to the microcontroller, giving you develop the MCU + FPGA for co-processing application.
58mm x 56.5mm x 10mm
- Board X 1
*Each order comes with one assembled and tested Melon S3 FPGA board, (Pin headers not included).